Embodiments relate to an electric device and methods thereof. Some embodiments relate to an image sensor, and a method of manufacturing an image sensor.
A photodiode (PD) may be formed by implanting ions into a substrate. As the size of a PD relatively decreases such that the number of pixels relatively increases without a substantial increase of chip size, image quality may be minimized due to an area reduction of a light receiving part. Also, a stack height may not be relatively decreased with respect to a area reduction of a light receiving part, and the number of photons input into a light receiving part may be relatively decreased due to a diffraction of light which may reference “Airy Disk”.
A PD may also be deposited by using amorphous silicon (Si). After a readout circuitry is formed on and/or over a Si-substrate through a wafer-to-wafer bonding scheme, a PD may be formed on and/or over a readout circuitry, which may relate to a three-dimensional image sensor. In this case, a PD is connected with readout circuitry through a metal line.
A P+/N−/N+ layer may be formed on and/or over a silicon layer used for a PD, for example as a light receiving part, through an ion implantation process. Ion implantation may be performed with respect to a P+ layer such that a P+ layer may serve as a ground, and a N-layer may serve as a PD area, for example, as a light receiving part. An N+ layer may be used as an ohmic contact area. An ohmic contact may be used to significantly reduce a width of a boundary barrier by relatively increasing N-type doping concentration such that electrons may be subject to tunneling. As a result, an ohmic contact may allow current to smoothly flow in a bi-direction between metal and silicon.
If an N+ area is formed on and/or over an entire surface of a silicon area through an ion implantation process, ion implantation into a remaining area excluding an ohmic contact area may cause a junction leakage current. Accordingly, undesirable electrons may occur in addition to electrons generated by light. This may relatively reduce a module yield rate and/or cause low light performance, for example in a CMOS image sensor (CIS). In addition, charge sharing may occur since both source and drain of a transfer transistor, which may be both terminals of a transfer transistor, may be heavily doped with N type ions. Charge sharing may lower the sensitivity of an output image and/or cause an image error. Photo charges may not smoothly move between a PD and read-out circuitry, such that a dark current may occur, and/or such that saturation and/or sensitivity may be lowered.
Accordingly, there is a need for a image sensor and a method of manufacturing an image sensor which may minimize a junction leakage current, minimize undesirable electrons, minimize degradation of low light performance, maximize a module yield rate, achieve substantially fully-dumping of photo charges, and/or provide a relatively smooth moving path of photo charges.